EL941: Network Processors

Instructor: Dr. Cheuk Lam
Tel:
E-mail:

Course Description:

Network processors, combining advanced technologies in both protocol processing and embedded processor architecture, have been recognized as one of the most required building blocks in networking systems that require both high performance and programmability. The goal of this course is to study the fundamentals of packet processing, and the leading architectures and implementations of commercial network processors and their design tradeoffs. Through the labs, students will also have a chance to gain hands-on programming experience in both simulator and real system environments using two of the most popular network processors in the industry.

Course Outline:

Introduction
Week 1: Introduction to Packet Processing
Networking protocols; Illustration of packet processing at a network node; Network processing functions: segmentation and reassembling, classification and forwarding, buffering, traffic management; Abstract of network processor architecture; Highlights of pipelining and parallel processing.

Part I: NP Architectures
Week 2: Multiple RISC based Architecture: Intel IXP 2xxx
Architecture of RISC processors; Multiple RISC based processors; IXP 2400 architecture; Other IXP 2xxx variants; Introduction to IXP software platforms.

Week 3: Multiple VLIW based Architecture: Agere APP 5xx
VLIW based processors; Multiple VLIW based processors; History of Agere PayloadPlus processors; APP 550 architecture; Introduction to APP software platforms.

Week 4: Comparisons and Other NP Architectures
Comparison of IXP and APP; Introduction to other commercial NP architectures.

Part II: NP Fundamentals
Week 5: Memory Management
Memory hierarchy: registers, cache and local memory, SRAM and DRAM; Memory interface; Estimation of memory performance.

Week 6: Pipelining and Parallel Processing
Pipeline of processors; Information passing and the media: next-neighbor registers, scratchpad, event signals; Multi-threading; Thread management and synchronization methods: semaphore, critical section, sequence control, using event signals.

Week 7 (half): I/O Interface
Ethernet MAC, SPHY, MPHY, SPI-3, SPI-4.2, CSIX, PCI Express; Overhead and performance; Backpressure.

Midterm
Week 7 (half): Midterm

Part III: NP Functions
Week 8: Receive, Transmit and SARing
Using building blocks in RISC based NPs; Coprocessor support for SARing and CRC computation.

Week 9: Classification and Forwarding
Illustration of forwarding by examples: bridging, IP forwarding, VPLS; Pattern matching algorithms; Using CAM.

Week 10: Traffic Management
Why policing and shaping; Leaky bucket policing; Tag vs. drop; Buffer sharing; Packet discard schemes: EPD, RED, WRED; Challenges in traffic shaping.

Week 11: Scheduling
Schedule methods: Fixed priority, Round Robin (RR), Weighted RR (WRR), Weighted Fair Queuing (WFQ), Guarantee Frame Rate (GFR), APP’s 4-list Smooth Deficit WRR (SDWRR); Scheduling hierarchy; Implementation; Precision vs. memory consumption.

Part IV: Selected Advanced Topics
Week 12: Coprocessors; Scalability; Design tradeoffs; Debugging

Project Presentations
Week 13: Project Presentations I
Week 14: Project Presentations II

Labs:
Part I: IXP Simulator
I-1: IXP Simulator Basics
Follow examples to learn using the simulator. Create a new project to study the performance limit on memory access.

I-2: IXP Microcode Building Blocks
Follow examples to learn using building blocks.

Part II: IXP Evaluation System
I-3: IXP Evaluation System Basics
Boot-up; Serial port access for debugging; Image loading; etc.

I-4 (optional): Develop a small project on the real system.

Part III: APP Simulator
A-1: APP Simulator Basics
Follow examples to learn using the simulator. Create a new project to study APP’s basic performance and/or limitations.

A-2: To Be Determined

Part IV: APP Evaluation System
A-3: APP Evaluation System Basics
Boot-up; Serial port access for debugging; Image loading; etc.

A-4 (optional): Develop a small project on the real system.


Reference Books:

• "Intel Internet Exchange Architecture and Applications: A Practical Guide to Intel's Network Processors"
  Bill Carlson
  Intel Press, 2003
  
• "Network Systems Design using Network Processors, Agere Version"
  Douglas E. Comer
  Prentice Hall, 2005
  
• "Designing High-Performance Networking Applications - Essential Insights for Developers of IXP2XXX Network Processor-based Systems"
  Uday R. Naik and Prashant R. Chandra
  Intel Press, 2005
  

Prerequisite:

Preferably two of the following three groups of courses:
• CS2214 Computer Architecture and Organization, or
  CS613 Computer Architecture I;
• EE3144 Introduction to Embedded System Design, or
  EL548 Real Time Embedded Systems;
• EL537 Internet Architecture and Protocols, or
  EL637 Local and Metropolitan Area Networks

Class meet: Wednesday 6:00pm - 8:15pm

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